- More information about Mic-4
- Common Operations in Mic-1
- Information about Chip Select
- 3-input Boolean function using SSI chips.
- 4-input Boolean function on the MSI multiplexer chip.
- More information about the C and N bits when comparing numbers.
- Decentralized Bus Arbitration. I have updated this so that it holds Bus Busy until the device has finished with the bus.
- Implementation of the Majority function using the LSI PLA chip from page 95.
- Implementation of the Majority function using SSI chips.
- A great page for memory information
- Types of memory
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Bus Information
- Bus Arbitration
- A good definition of the different buses on a system
- Decentralized Bus Arbitration. I have updated this so that it holds Bus Busy until the device has finished with the bus.
- PCI Information
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Penntium III and IV information
- Information on the Pentium IV
- Information on the 400 MHz system bus on the Pentium IV
- Slot and Socket Information for the Pentium II and Pentium III
- Summary of Pentium IV features
- History of processors and a flame of the Pentium IV
- Pentium IV uses Socket 423 (53 more than the Pentium III Socket 370)
- Precessor Summaries
- Pipelining
- Branch Prediction
- Superscalar
- Changing hex microinstructions to MAL
- Calculating offsets for jumps in Java Byte Code
More Information on the N and C bits
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It is not possible to use the N bit alone to determine the relative order
of unsigned numbers. Try to create the following examples:
- Perform A - B where the result is negative, and B > A as unsigned numbers
- Perform C - B where the result is positive, and B > C as unsigned numbers. Use the same value for B as in the first example.
- The C bit is implemented as I had described originally. It is set as if the subtraction were done without using the 2's complement of the number. Perform the subtraction as you would normally (not with 2's complement), if you need to borrow to complete the subtraction, then the carry bit will be set. This raises the question of how this would be implemented in hardware. One solution would be to negate the carry-out of the highest ALU whenever the ALU forms the 2's complement of the A bus.
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