There are 100 points on the test. Answer all the questions.
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(6) Are the following boolean expressions equivalent? Prove your answer by
drawing the truth tables for both.
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A + BC
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(A + B)(A + C)
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(4) Draw the circuit for a 4-bit comparator. The comparator should have eight
inputs (four for each word being compared), and 1 output. The output should
be true when the two 4-bit input words are equal bit-by-bit.
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Consider the boolean function of three input variables that is TRUE when
the English word that represents the value of the inputs as a binary number
has four letters. In case you are totally stressed out, the English words
are: ZERO, ONE, TWO, THREE, FOUR, FIVE, SIX, SEVEN. So, the function would
be true for ZERO, FOUR, and FIVE, false for the rest.
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(12) Draw a circuit diagram for this function using any combination of AND,
OR, NAND, NOR, NOT gates.
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(6) Draw a diagram for this function using a single multiplexer. You do not
need to draw the inside of the multiplexer, just draw all the input lines
and output lines. Be sure to show where the input lines are connected.
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(12) Draw a diagram for this function using the SSI chips on the last page.
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(6) Fill in the PLA for this circuit on the second to the last page.
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(4) Crystals send out symmetric pulses. How is a clock with an asymmetric
cycle created?
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(4) What is the difference between DRAM and SRAM?
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(4) Explain how the CS, RD, and OE lines are used in a memory chip.
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(6) Explain how an asynchronous bus works. Be sure to explain how each of
the following lines are used: ADDRESS, DATA, MREQ, RD, MSYN, SSYN.
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(4) Draw a diagram for and explain one-level centralized bus arbitration.
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(4) What is unexpected about the data and address lines on an 8088 CPU chip?
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(4) How is the READY line used on the 8088?
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(4) How is the LOCK line used in an 8088?
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(4) What does the BHE line do on the 80286?
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(4) Only 30 of the 80386 address lines physically exist. How is it possible
for the 80386 to read or write every byte in memory?
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(6)A ROM chip is going to use Memory-Mapped I/O. The ROM will use memory
addresses from 0 up to 2K. Below are the address lines in a computer that
can only reference 64K of memory. Show how the ~CS line on the ROM would
be wired from the address lines. Use full address decoding.
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(6) In the worst case, how much time will the memory chip have after the
assertion of ~MREQ and ~RD to get the data onto the bus?
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This is part of a PLA. It has three input lines, four AND gates, four OR
gates. Implement the boolean function from number 3d on this PLA. Draw an
X through the fuses that should be blown. The fuses are represented by the
open squares.