Midterm Review Topics for CDA4101
Exam date: October 16
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Computer Organization Book, Chapter 1
- Multi-level machines
- Interpreter
- Translator
- Hardware and software
- Zeroth generation- mechanical
- First generation - vacuum tubes
- Second generation - transistors
- Third generation - integrated circuits (SSI, MSI, LSI)
- Fourth generation - VLSI
- von Neumann
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Computer Organization Book, Chapter 2
- CPU, data path, ALU
- organization of a simple computer
- fetch-decode-execute cycle
- parallel computers: SISD, SIMD, MIMD
- pipeline machine
- vector machine
- array processor
- memory addresses and memory cells
- big endian vs little endian
- error-correcting and error-detecting codes
- Hamming distance
- Hamming code with a distance of 3
- Parity code
- magnetic tape organization
- disk organization (yes, cylinders and tracks!)
- Optical disks - lands and pits
- data channels, SCSI, DMA
- CRT
- horizontal scan
- vertical scan
- electron gun
- boustrophedonic!
- Character-map terminals
- bit-map terminals
- pixels
- RS-232-C terminals
- UART
- modems
- amplitude modulation
- frequency modulation
- phase modulation
- baud rate
- sending more than 1 bit per time interval
- asynchronous vs synchronous transmission
- simplex, half-duplex, full-duplex transmission
- printers
- character codes
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Computer Organization Book, Chapter 3
- NOT, NAND, NOR, AND, OR (and Bill) gates
- boolean algebra - table of identities for equivalent expressions
- implementing boolean functions
- drawing circuit using AND, OR, NOT, NAND, NOR, XOR
- drawing circuit using SSI chips
- drawing circuit using MSI chips
- drawing circuit using LSI chip (PLA)
- circuit equivalence (I give you one, you tell me what it is like)
- multiplexers and demultiplexers
- encoders and decoders
- comparators
- PLA
- shifter (left/right, left/right/noshift)
- half-adder, full-adder
- ALU
- clocks: how to generate asymmetric clock
- memory
- latches
- clocked SR latches
- clocked D latches
- flip-flops
- registers
- memory array
- meaning of 256K x 1, 32K x 8
- RAM, DRAM, SRAM
- PROM, EPROM, EEPROM
- micorprocessor chips
- address pins
- data pins
- control pins (know the types of control pins)
- bus
- slave
- master
- synchronous (know what the timing table means)
- asynchronous (know what the full handshake is)
- bus arbitration
- daisy-chaining
- centralized
- decentralized
- interrupt handling process
- 8088
- bus control
- multiplexed address and data pins
- two levels of interrupts
- coprocessor communication and bus arbitration
- 80286
- address lines, data lines
- bus control
- four functional units inside CPU
- bus arbitration
- coprocessor communication
- 80386
- address lines, data lines
- bus control
- coprocessor control
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