Midterm Review Topics for CDA4101

Exam date: October 8, 1997

Computer Organization Book, Chapter 3

• NOT, NAND, NOR, AND, OR (and Bill) gates
• equivalent boolean expressions
• implementing boolean functions
  • drawing circuit using AND, OR, NOT, NAND, NOR, XOR
  • drawing circuit using SSI chips
  • drawing circuit using MSI chips
  • drawing circuit using LSI chip (PLA)
• circuit equivalence (I give you one, you tell me what it is like)
• multiplexers and demultiplexers
• encoders and decoders
• comparators
• PLA
• shifter (left/right, left/right/noshift)
• half-adder, full-adder
• ALU
• clocks: how to generate asymmetric clock
• memory
  • latches
  • clocked SR latches
  • clocked D latches
  • flip-flops
  • registers
  • memory
  • meaning of 256K x 1, 32K x 8
  • RAM, DRAM, SRAM
  • PROM, EPROM, EEPROM
• micorprocessor chips
  • address pins
  • data pins
  • control pins (know the types of control pins)
• bus
  • slave
  • master
  • synchronous (know what the timing table means)
  • asynchronous (know what the full handshake is)
• bus arbitration
  • daisy-chaining
  • priority levels
  • centralized
  • decentralized
• interrupt handling process
• 8088
  • bus control
  • multiplexed address and data pins
  • two levels of interrupts
  • coprocessor communication and bus arbitration
• 80286
  • address lines, data lines
  • bus control
  • four functional units inside CPU
  • bus arbitration
  • coprocessor communication
• 80386
  • address lines, data lines
  • 8 functional units inside CPU
  • bus control
  • coprocessor control
• Memory-mapped I/O
  • Full-address decoding
  • Partial-address decoding

Top of page