Assignment 4, CDA4101, Fall 1997

Due Wednesday 11/12 at the start of class.

1. (1 point) Explain how the AMASK register is used in the microprogram.
2. Suppose that the ROM that holds the microprogram is 512 words instead of 256. This means that an address into the ROM would need 9 bits.
   • (1 point) How can the microinstruction layout of Figure 4-9 be changed to include a 9 bit address field, but without losing any of the current functionality of the instruction.
   • (1 point) What change would have to be made to the hardware to implement the above modification?
3. The design of the hardware of Figure 4-10 has an N bit and a Z bit. Suppose you are to add the O bit and V bit from the previous assignment.
   • (1 point) How would you implement the O bit (unsigned overflow) in hardware?
   • (1 point) How would you implement the V bit (signed overflow) in hardware? (The V bit is set when the carry into the highest bit is different from the carry out of the highest bit)
   • (1 point) Suppose that we added two new microinstructions JMPO and JMPV. JMPO would cause a conditional jump if the O bit was set, and JMPV would cause a conditional jump if the V bit was set. This would require three bits for the COND field of the microinstruction. Devise appropriate names for these three bits and give me the revised boolean statement for the Mmux signal. (The boolean statement for the previous Mmux signal is on page 178).
4. Consider the following Pascal-like procedure (vec is defined in the procedure on page 180):

   procedure Reverse (var x, y: vec; Size: integer); 
     var Count:integer;
   begin
     for Count := 1 to Size do 
       y[Count] := x[Size - Count + 1];
   end;
   
   

   • (1 point) Draw a picture of the stack frame for this procedure.
   • (3 points) Write the assembly language program for this procedure using the Mac-1 instruction set of Figure 4-14.
5. The following eight macroinstructions are to be added to the Mac-1 language of Figure 4-14:

   ANDD

   AND direct, ac := ac AND m[x]

   ANDL

   AND local, ac := ac AND m[sp + z]

   ORD

   OR direct, ac := ac OR m[x]

   ORL

   OR local, ac := ac OR m[sp + z]

   XORD

   XOR direct, ac := ac XOR m[x]

   XORL

   XOR local, ac := ac XOR m[sp + z]

   NOTD

   NOT direct, ac := NOT m[x]

   NOTL

   NOT local, ac := NOT m[sp + z]

   You are to modify the machine instructions to include these new instructions. You decide what the operation code for each should be. You may change other instructions to accommodate these new instructions, but you must follow these rules:

   • x and z will be numbers in the machine instruction for each of these.
   • All machine instructions will be 16 bits long. I mean all, not just these new ones.
   • All direct instructions must be able to access all of memory (12 bits).
   • The JUMP and CALL instructions must be able to access all of memory (12 bits).

   Give me the following for this new architecture

   • (3 points) Give me a list of all new and modified instructions. Give me a description of each of these. Indicate any necessary changes to hardware.
   • (3 points) Show me the new and modified microcode for these instructions. Include the line number for modified instructions, add new instructions after line 78 in Figure 4-16. If you need to add instructions between two old instructions, for example between 17 and 18, then label them 17a, 17b, 17c, etc.
     
6. (2 points) Draw the PLA for figure 4-19. Assume you have a 4-input, 13-output PLA. The input lines are for the four bits of the op code, the 13 output lines are the labels at the top of the figure. Notice that only 15 combinations of the inputs are needed. So the PLA should have four input lines, 15 AND gates and 13 OR gates. Draw the PLA, it will be easier than drawing all the circuits.
7. (2 points) What is the difference in size for Mic-1 if a nanostore is used?