Assignment 4, CDA4101, Fall 1998

Due Monday 11/9 at the start of class.

1. The following two macroinstructions are to be added to the Mac-1 language of Figure 4-14:

   ANDD

   AND direct, ac := ac AND m[x]

   ANDL

   AND local, ac := ac AND m[sp + y]

   You are to modify the machine instructions to include these new instructions. You decide what the operation code for each should be. You will change (and move one of???) the local instructions (LODL, ADDL, STOL, SUBL) to accommodate these new instructions, but you must follow these rules:

   • x will be 12 bits from the machine instruction.
   • y will be 8 bits from the machine instruction.
   • All machine instructions will be 16 bits long.
   • All local instructions (LODL, STOL, ADDL, SUBL, ANDL) will be limited to adding an 8 bit number to the stack pointer, instead of 12 as it is designed in the book. Only move the ones that must be moved.

   Give me the following for this new architecture

   • (2 points) Give me a list of all new and modified conventional machine code instructions. Give me a description of each of these.
   • (3 points) Show me the new and modified microcode for these instructions. Include the line number for modified instructions, add new instructions after line 78 in Figure 4-16. If you need to add instructions between two old instructions, for example between 17 and 18, then label them 17a, 17b, 17c, etc. Do not rewrite the entire microprogram. Just give me the changes and how they would fit into the microprogam. Be sure to add any new decoding instructions, too.
     
2. (5 points) Draw the PLA for figure 4-19. Assume you have a 4-input, 13-output PLA. The input lines are for the four bits of the op code, the 13 output lines are the labels at the top of the figure. Draw the PLA. Only draw the input lines that you need. It is possible to simplify  many of the boolean equations.
   
3. (5 points) Horizontal Architecture. The microprogram on pages 190-191 uses 2528 bits of memory.
   1. The microprogram on pages 190-191 is bigger than it needs to be. There is some redundancy in the code.
      • What could be rewritten in the code to reduce the number of lines in the code?
      • What is the percentage of savings of the new size to the old size: (old-new)/old?
   2. Suppose the microprogram on pages 190-191 were rewritten using a nanostore.
      • What is the difference in size if a nanostore is used? Include the size of the new control store and the nanostore in your calculation.
      • What is the percentage of savings?
   3. Suppose the microprogram on pages 190-191 were rewritten using a nanostore, but the address field of the MIR would be filled from the control store, not the nanostore. This means that the width of the nanostore would be 8 bits less, but the width of the control store would be wider by 8. The possible advantage of this design is to produce more instructions that are identical: if two instructions are the same except for the target of a jump, then they would now be considered the same.
      • Calculate the size of the new control store and nanostore.
      • What is the percent savings using this design over the original design.
        
4. (5 points) Vertical Architecture. The microprogram on pages 200-201 uses 1920 bits of memory. A 24% savings over the horizontal design.
   1. The microprogram on pages 200-201 is bigger than it needs to be. There is some redundancy in the code.
      • What could be rewritten in the code to reduce the number of lines in the code?
      • What is the percentage of savings of the new size to the old size: (old-new)/old?
   2. Suppose the microprogram on pages 200-201 were rewritten using a nanostore.
      • What is the difference in size if a nanostore is used? Include the size of the new control store and the nanostore in your calculation.
      • What is the percentage of savings using this design over the original design?
   3. Suppose the microprogram on pages 200-201 were rewritten using a nanostore, but the address field of the MIR would be filled from the control store, not the nanostore. This means that the width of the nanostore would be 8 bits less, but the width of the control store would be wider by 8. The possible advantage of this design is to produce more instructions that are identical: if two instructions are the same except for the target of a jump, then they would now be considered the same.
      • Calculate the size of the new control store and nanostore.
      • What is the percent savings using this design over the original design.