CDA-4101 Section 01, Fall 1998 Syllabus

Office Information
Room: BA 254B		Phone: 348-3329 (FIU-D-DAY)
Office Hours
Monday, Wednesday		1300 - 1345, 1715 - 1815
Tuesday, Thursday		1130 - 1215, 1545 - 1645
Internet Information
E-mail: (local) downeyt (full) downeyt@fiu.edu		Web: http://www.cs.fiu.edu/~downeyt
Homework Grading Policy
Each assignment		0 to 20 points
Objective (Does it worked as it should?)		15 points
Subjective (Do I like it?)		5 points
Exams and Assignments
	Exam 1	Exam 2	Homework
% of Grade	30%	30%	40%
Dates	Wed 10/7	Mon 12/7 1825-2105	Various
Text
Structured Computer Organization, Fourth Edition, Andrew S. Tannebaum, Prentice Hall
Room and Time
GC278-A MW 1825 - 1940

Special Dates

No class Monday 9/7

No class Wednesday 11/11

Drop Date Friday 10/16

Attendance I recommend that you attend every class. Those who attend class have a better chance of passing the course.

Prerequisites MAD 2104, COP 3402, COP 3337

Late Program Policy You may hand in a program up to 24 hours late. You lose 1 point off the grade for every 6 hours. Programs are due at the START of class. You may hand in a program up to 1 week late, I will start the grading for very late programs at 10 points (50%).

Working Together on Programs is NOT ALLOWED. There is a large difference between discussing general aspects of the course and discussing specific aspects of a program. Do not discuss your solution of a problem with others. Assignments that are too similar will not be graded. With a second occurrence, you will earn an F in the course.

Course Content

• Multilevel Computers
• The Conventional Machine Language Level
• The Assembly Language/ Relocatable Level
  • Relocatable Code
  • Structure of an Assembler
  • Structure of a Linking Loader
• The Digital Logic
  • Level Gates and Boolean Algebra
  • Basic Digital Logic
  • Circuits
  • Memory
  • Busses
• The Microprogramming Level
  • A Higher Level View of the Digital Logic Level
  • An Example Macroarchitecture
  • An Example Microarchitecture
  • Vertical vs. Horizontal Microarchitectures
  • Nano-programming
  • Performance Optimazation
• The Operating System Level
  • Memory Management
  • Cache Memory
  • Real Memory Systems
  • Virtual Memory Systems
  • Paging
  • Segmentation
  • Virtual I/O Instructions
• Advanced Computer Architectures
  • Reduced Instruction Set Computers
    • Attributes of RISC Machines
    • The RISC Design Philosophy
    • Instruction Fetch/Decode/Execute
    • Pipelining
    • RISC vs. CISC
  • Parallel and Dataflow Architectures
    • A Taxonomy
    • SIMD Computers
    • MIMD Computers
    • Dataflow Architectures