CDA4101, Summer A 1998, Homework 5

This homework is optional, although similar material will be on the exam. If you choose to do the homework, then I will calculate your homework average using all five homework assignments. This would reduce the impact of a low grade on one of the assignments. With five homework assignments, then each assignment is worth 8% of the total grade. With four assignments, each assignment is worth 10% of your total grade.

  1. (2) Compute the execution time in microinstructions for each Mac-1 instruction running on Mic-1. In other words, count how many Mic-1 instructions are needed for each Mac-1 instruction, including the instructions that decode the op code.
  2. (2) Compute the execution time in microinstructions for each Mac-1 instruction running on Mic-2. In other words, count how many Mic-2 instructions are needed for each Mac-1 instruction, including the instructions that decode the op code.
  3. (4) Translate each of these MAL statements into binary in the format of a microinstruction for Mic-1
    1. a = c + b; rd; if n goto 14
    2. mar = sp; mbr = ac; wr; goto 20
  4. (4) What is the MAL statement (Micro Assembly Language, the stuff we used to write the microporgram) for  each of the following binary numbers loaded into the MIR?
    1. 11001000000100011001000000001000
    2. 00000000110100100010011000000000
  5. (2) The president of Nano-Micro-Milli Memory Company has been so impressed by the sales of their nanostores that he has considered adding a picostore to the product line. The picostore would be referenced by the nanostore, the same way the nanostore is referenced by the control store; that is, each nanoword would contain the address of a pico instruction just as the control store contains nanoinstruction addresses. You are the Vide-President in charge of Getting Rid of Stupid Ideas. What do you think of this proposal?
  6. (2) Assume that the 24 bit address F8E39Dh is used in a system with a cache. How would you determine if it is in the cache for the following organizations?
    1. Associative cache with 512 entries, each block is 16 bytes. Give me the block number in binary.
    2. Direct-mapped cache with 2048 entries, ecah block is 8 bytes. Give me the slot number and tag number in binary.
  7. (4) Suppose in a virtual memory system there are 6 virtual pages and 3 actual pages. Indicate which page references will force a new page into memory and whcih page was evicted (if any) if the pages are referenced in the follwing order for the following page replacement policies:
    FIFO LRU
    Page Fault (y/n) Replace Order Fault (y/n) Replace Order
    1            
    2            
    3            
    1            
    2            
    4            
    1            
    2            
    3            
    4