CDA4101, Spring 1999, Final Topics

Chapter 3

• 3.5 Example CPU Chips
  • Pentium II
  • UltraSparc II
  • picoJava II
• 3.6 Example Buses
  • PCI Bus
  • Universal Serial Bus
• 3.7 Interfacing
  • PIO Chips
  • Address Decoding

Chapter 4

• 4.1 An Example Micorarchitecture
  • The data path
  • Data path timing
  • Memory operation
  • Micoinstructions
  • Mic-1
• 4.2 An example ISA: IJVM
  • Stacks
  • The IJVM memory model
  • The IJVM instruction set
  • Compiling Java to IJVM
• 4.3 An example implementation
  • Microinstructions and notation
  • Implementation of IJVM using Mic-1
• 4.4 Design of the microarchitecture
  • Speed versus cost
  • Reducing the execution path length
  • Merging the Interpreter Loop with the Microcode
  • A Three-bus Architecture
  • An Instruction Fetch Unit
  • Mic-2: IFU
  • Mic-3: Pipelined
  • Mic-4: Seven-stage pipeline
• 4.5 Improving performance
  • Cache memory
    • Direct mapped
    • Set associative
    • Full Associative
  • Branch Prediction
    • Static
    • Dynamic
  • Out-of-order execution and Register Renaming
  • Speculative Execution
• 4.6 Examples of the microarchitecture level
  • Pentium II
  • UltraSparc II
  • picoJava II