Assignment 2

Due  2/22 at the start of class

1. The shifter on page 136 only has two functions: shift right and shift left. Modify it so that it can do four functions: arithmetic shift right, logical shift right, shift left, don't shift. The shifting done in the book is logical shifting: a 0 is placed into the S0 or S7 bit, depending on which way the shift goes. An arithmetic shift left is the same as a logical shift left, a 0 is placed into bit S7. An arithmetic shift right places D0 into both S0 and S1: it is duplicating the sign bit.
   
2. Whatever is done in software can be done in hardware. On the PC, subtraction is done in software, but the designers could have included a harware subtraction circuit in the CPU. It is very similar to the adder. One difference is that the Carry lines are called the Borrow lines. There are other differences, too.
   1. Draw the circuit for a half-subtractor.
   2. Draw the circuit for a full-subtractor.
      
3. The ALU on page 138 has four functions: A ADD B, A AND B, A OR B, NOT B. Redraw it so that it has all of the old functions, plus A SUB B, A (just move A through the circuit), A COMPARE B (true when A and B are equal), A ADD 1 (add in the carry bit, too). If you didn't do number 2, then just indicate an empty box for the subtraction circuit, and indicate how it is selected, and what lines go into it. If you did number 2, then you might see a way to simplify the ALU without including a complete, separate circuit for subtraction (or maybe not). You might need a large piece of paper for this one. The Carry In and Borrow In lines share the same pin, as do the Carry Out and Borrow Out lines.
   
4. An SR latch can also be built from two NAND gates, instead of two NOR gates.
   1. Draw such a circuit.
   2. What are the normal states for S and R when the circuit is not being set or reset?
   3. What are the states for S and R that should be avoided, because they make the output of the circuit random?
   4. What values should S and R have to store a 1 in the memory?
   5. What values should S and R have to store a 0 in the memory?
      
5. The 4 X 3 memory of Figure 3-29 uses 22 AND gates and three OR gates. It also has 11 input, output, and control lines.
   1. Suppose the circuit were expanded to 256 X 16.
      1. How many AND gates would be needed?
      2. How many OR gates would be needed?
      3. How many input, output, and control lines would be needed?
   2. Suppose the circuit were expanded to 512 X 8.
      1. How many AND gates would be needed?
      2. How many OR gates would be needed?
      3. How many input, output, and control lines would be needed?
         
6. Consider a 16 x 1 memory chip that is stored as a 4 x 4 array of flip-flops. Frist the 4-bit row address is sent to he chip, and on the next clock cycle, the 4-bit column address is sent. There will be 1 data line in, 1 data line out, 4 address lines and !CS, !WE, !OE, !CAS, !RAS as described in the text. Design the chip. Remember that the row address has to be know for 2-cycles so that the row and column can be determined.