CDA 4101

General

• Mailing List

  SCIS maintains a mailing list on www.cs.fiu.edu for this class. Your FIU e-mail address is already on the list. To retrieve your password for access to the list, go to the following link, scroll to the bottom, enter your FIU e-mail address in the box for Edit Options and submit it. The next page has a button for retrieving your password. Do not change your password to your regular FIU password, as the mailing list passwords are not encrypted.

  • Section 02:
    http://www.cs.fiu.edu/mailman/listinfo.cgi/aul-cda4101u02
  • Section 03:
    http://www.cs.fiu.edu/mailman/listinfo.cgi/aul-cda4101u03

  You may add more than one address to the list. When adding a new e-mail, be sure to follow the instructions about placing 'confirm ######' in the body of the text. If you only reply, it might not work.This is a moderated list, so only messages that I approve will be sent to you. I will sell your e-mail address to whomever wants to buy it (just kidding).

• Syllabus
  • Section 02 (TR 5:00)
  • Section 03 (TR 7:50)
• Exam Information will be posted here prior to exams.
  • Check the Moodle calendar for exam dates.
  • Quiz 1 will be on February 23. It will be administered during the first 25 minutes of class. It will cover the material from Homework 1.
  • Exam 1 will be on March 1.
    • Book Chapters
      • Chapter 1 - all
      • Chapter 2
        • 2.1
        • 2.2 - skip 2.2.4
        • 2.3 - only 2.3.1
        • 2.4 - only 2.4.1
      • Chapter 3
        • 3.1
        • 3.2
        • 3.3
        • 3.4
        • 3.5
    • Lectures: ch1, ch2, ch3-part-1-real, ch3-part2 (through ATmega), video ch3-part2
  • Quiz 2 will be on 3/24. It will be administered during the first 30 minutes of class. It will cover the material from Homework 2.
  • Exam 2 will be on 3/31.
    • Chapter 3
    • 3.4
    • 3.5
    • 3.6
    • 3.7
    • Chapter 4
      • 4.1
      • 4.2
      • 4.3
    • Chapter 5
      • Section 5.5.7
      • Section 5.6
    • Lecture notes: ch3-part1-real (from bus arbitration algorithms), ch3-part2, ch4_4.1-4.3 (video), address-decoding (video), ch5, ch4_4-2_fixed, ch4_4-3, ch4_4.3_encode_mal (video)
  • Quiz 3 will be on 4/9. It will be administered during the last 15 minutes of class. It will cover part of chapter 4: 4.1, 4.2, 4.3.

    Guarantees:

    • Identify the microcode implementation of an IJVM instruction.
    • Write the microcode implementation of an IJVM instruction
  • Exam 3 will be on Thursday, 4/28. This is the last day of class. The exam is the third exam, it is not a comprehensive final exam.
    • Chapter 4. The emphasis will be on sections 4.3 through 4.7, but concepts from 4.1 and 4.2 must be known, in order to answer questions from 4.3 through 4.7.
    • Lecture notes: ch4_4.1 (video), ch4-4-2,
      ch4_4-3, ch4_4.3.2 (video), ch4_4-3-2_procedures,
      ch4_4-4-1_4-4-2 (video), ch4_4-4-3, ch4_4-4-4, ch4_4-4-5,
      ch4_4-5-1, ch4_4-5-2, ch4_4-5-3 (misnamed as ch4_4-5-6 in section 03), ch4_4-5-4 (video),
      ch4_4-6
    • Video lectures: 3/3: section 4.1 (5 videos); 3/24: section 4.3.2 (3 videos), 3/31: sections 4.4.1 and 4.4.2 (2 videos), 4/24: section 4.5.4 (1 video); section 4.6 (2 videos).
  • Exam 4e
    • Check your Panther Soft schedule for the day and time./li>
    • Chapter 4, sections 4.4.5, 4.5, 4.6, 4.7, 4.8
    • Chapter 5, sections 5.5.7 and 5.6
    • Chapter 8, section 8.3
    • Lecture notes from 11/5 - 12/3
• Chapter 2 Topics to Skip
  • 2.3.7 CD-ROMs
  • 2.3.8 CD-Recordables
  • 2.3.9 CD-Rewritables
  • 2.3.10 DVD
  • 2.3.11 Blu-Ray
  • 2.4.2 Terminals
  • 2.4.3 Mice
  • 2.4.4 Game Controllers
  • 2.4.5 Printers
  • 2.4.6 Telecommunications Equipment
  • 2.4.7 Digital Cameras
  • 2.4.8 Character Codes

Online Resources

• Video Lectures for 2/16
  • Chapter 5
    • Section 5.5.7
    • Section 5.6
    • Section 5.6
    • Ubiquitous Presenter notes from the Chapter 5 videos. These notes do not contain any ink, as the videos contained animations. These are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
  • Chapter 3
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • ATmega and Bus Throughput
    • Bus Throughput and Core i7 buses
    • Ubiquitous Presenter notes from the Chapter 3 videos. These are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
• Video Lectures for 3/1
  • Chapter 3 - Address Decoding
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • Address decoding
    • Complex address decoding
• Video Lectures for 3/3
  • Chapter 4 - Section 4.1
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • Data Path
    • Data Path Timing
    • Memory Operations
    • Microinstruction Register
    • Control Store
• Video Lectures for 3/10
  • Chapter 4 - Section 4.3
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • Encoding MAL
• Video Lectures for 3/24
  • Chapter 4 - Section 4.3.2
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • Explaining microsinstructions
    • Explaining microsinstructions: WIDE, IINC, GOTO
    • Explaining microsinstructions: IFLT and INVOKEVIRTUAL
• Video Lectures for 3/31
  • Chapter 4 - Sections 4.4.1 and 4.4.2
    • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
    • Speeding Up Microarchitecture
    • Hardware for Speeding Up Microarchitecture
• Video Lectures for 4/21
  • Notes for these videos are in a new classroom named videos_cda4101. You will have to find the classroom and register in it. The password is comporg. Click on the Enroll/unenroll link on the UP site and look for the class.
  • Chapter 4 - Section 4.5.4
    • Speculative Execution
  • Chapter 4 - Section 4.6
    • Core i7 Architecture
    • OMAP and ATmega Architectures
• Moodle
  • You may skip some questions from the Chapter 2 previews.
    • Chapter 2 - Processors: do all questions
    • Chapter 2 - Memory: skip 5-12, 26-61
    • Chapter 2 - I/O: skip 13-60
  • Moodle site, section 02
  • Moodle site, section 03
• Class Notes
  • Information
  • The password for the slides is comporg.
  • List of lectures for section 02
  • List of lectures for section 03
• Zip file containing simulators for an assembler and mic-1.
• Free circuit drawing and running programs.
  • GNU Electric.
  • Logism - Online.
  • Digital Works.
• Videos for Wednesday, November 18.
  • I/O from 5.7
  • Traps from 5.6
  • Interrupts from 5.6
  • Parallel Computers from 8.3
  • MESI from 8.3
• Video for Wednesday, November 25.
  • Sections 4.5 and 4.6

Assignments

• Homework 1
• Homework 2
• Homework 3
• Extra Credit On Thursday, 4/7/16, I will ask you to write the answer to one of the Preview Questions from Moodle on Sections 4.4.4 and 4.4.5. I have created a Piazza forum where you can discuss answers with each other: CDA4101 Forum.
• Extra Credit 2 On Tuesday, 4/12/16, I will ask you to write the answer to one of the Preview Questions from Moodle on Section 4.5, questions 27 through 64, skip 61. I have created a Piazza forum where you can discuss answers with each other: CDA4101 Forum.
• Extra Credit 3 On Thursday, 4/14/16, I will ask you to write the answer to one of the Preview Questions from Moodle on Section 4.5, questions 65 through 91. I have created a Piazza forum where you can discuss answers with each other: CDA4101 Forum.
• Extra Credit 4 On Tuesday, 4/19/16, I will ask you to write the answer to one of the Preview Questions from Moodle on Section 4.6, questions 1 through 32. I have created a Piazza forum where you can discuss answers with each other: CDA4101 Forum.
• New: Extra Credit 5 On Tuesday, 4/26/16. Read section 8.3.3. I will ask you a question about snooping caches, like the diagram in Figure 8-28.

Miscellaneous

• Pipelining
• Superscalar
• Complete Memory Diagram
• Implementing the majority function using some of these SSI chips.
• 4-input Boolean function on the MSI multiplexer chip.
• Implementation of the Majority function using the LSI PLA chip from page 95.
• PCIe Information
• Information about Chip Select
• Decentralized Bus Arbitration
• C and N Bits
• Changing hex microinstructions to MAL
• Calculating offsets for jumps in Java Byte Code
• Common Operations in Mic-1
• Nice examples for MIC-1
• More information about Mic-4
• Branch Prediction
• OMAP4430 Information
• TriMedia Information
• Fermi GPU. The Fermi description begins on page 16.

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N and C Bits

• It is not possible to use the N bit alone to determine the relative order of unsigned numbers. Try to create the following examples:
  1. Perform A - B where the result is negative, and B > A as unsigned numbers.
  2. Perform C - B where the result is positive, and B > C as unsigned numbers.
  Use the same value for B as in the first example.
  3. Come up with an example where A - B = C - B. The N bit will be the same for both results, but the relative order of the numbers is different.
• The C bit is implemented as I had described originally. It is set as if the subtraction were done without using the 2's complement of the number. Perform the subtraction as you would normally (not with 2's complement), if you need to borrow to complete the subtraction, then the carry bit will be set. This raises the question of how this would be implemented in hardware. One solution would be to negate the carry-out of the highest ALU whenever the ALU forms the 2's complement of the A bus.

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